Abstract

A quantum computer simulator is a tool that simulates the operation of a quantum computer using classical computers. Researchers widely adopt the state-vector-based simulator to reproduce the state of quantum bits (qubits) faithfully. A challenge arises in requiring a main memory space of 2n + 4 bytes to handle n quantum bits. Considering power efficiency and cost, we propose implementing a quantum computer simulator named Qu-Trefoil using Serial ATA (SATA) disks directly connected to an FPGA board called Trefoil. Due to the limited data transfer speed between SATA disks and FPGA, improving the overall system performance is challenging. This study proposes improving the overall system throughput using data compression. Considering the data characteristics in the state vector method and the overall system structure, we verify that we can eliminate the communication bottleneck on the host side of Trefoil by employing the floating-point compression algorithm ZFP based on FPGA. Focusing on the compression aspect in Trefoil, this paper elucidates the bottlenecks of the target system and conducts implementation and evaluation. Moreover, by utilizing partially optimized compression IP, it is possible to achieve performance nearly four times higher than the original design, resulting in a throughput of 3.7GB/s, comparable with the benchmark ZFP working on CPU devices. Optimizing the entire IP can potentially improve the overall simulator’s performance.